- Email:
- jamehixo@iu.edu
Bio
James is learning and working with Field-Programmable Gate Arrays (FPGAs) and their applications in radiation environments. So far, James has worked on scrubbing and is currently developing an injection tool to learn more about bit-flip propagation while an FPGA is in operation. He plans to take these concepts and delve into them deeper in future research.
Research
Triple Modular Redundancy Single Event Mitigation (TMR SEM) IP
The TMR SEM IP was implemented for access to its scrubbing and injection capabilities.
Implemented the TMR SEM IP onto Xilinx Pynq-Z2 FPGA through AXI and UART protocols. This required accessing both the processor and internal configuration access ports, enabling partial reconfiguration and read/write permissions inside the FPGA.
